1. Field of the Invention
The invention relates to an image pickup apparatus for obtaining an image signal and, more particularly, to a solid state image pickup apparatus of an amplifying type of a CMOS process compatible XY address type.
2. Related Background Art
Hitherto, a solid state image pickup device has an MOS structure comprising a metal which can perform a photoelectric conversion, an oxide, and a semiconductor and is mainly classified into an FET type and a CCD type in accordance with a moving system of a light carrier. The solid state image pickup device is used in various fields such as solar cell, imaging camera, copying machine, facsimile, and the like and techniques such as converting efficiency and an integration density have been improved. As one of such amplifying type solid state image pickup apparatuses, there is a sensor of a CMOS process compatible type (hereinafter, abbreviated as a CMOS sensor). Such a type of sensor has been published in a literature such as "IEEE Transactions on Electron Device", Vol. 41, pp 452-453, 1994, or the like. FIG. 11B shows a circuit constructional diagram of a CMOS sensor. FIG. 11A shows a cross sectional view thereof. FIG. 11C shows a state diagram of charges during the accumulation of photons h.nu. of a photoelectric converting unit. FIG. 11D shows a state diagram of charges after the photons h.nu. were accumulated.
In FIGS. 11A and 11B, reference numeral 1 denotes a photoelectric converting unit; 2 a photo gate by an MOS transistor; 3 a transfer switch MOS transistor; 4 an MOS transistor for resetting; 5 a source-follower amplifier MOS transistor; 6 a horizontal selection switch MOS transistor; 7 a source-follower load MOS transistor; 8 a dark output transfer MOS transistor; 9 a light output transfer MOS transistor; 10 a dark output accumulating capacitor; 11 a light output accumulating capacitor.
Reference numeral 17 denotes a p-type well; 18 a gate oxide film; 19 first layer polysilicon; 20 second layer polysilicon; and 21 an n.sup.+ floating diffusion region (FD). One of the features of the present sensor is that the sensor is full CMOS transistor process compatible and an MOS transistor of a pixel portion and an MOS transistor of a peripheral circuit can be formed by the same processing step, so that the number of masks and the number of processing steps can be remarkably reduced as compared with those of a CCD.
An operating method will now be simply explained. First, a positive voltage is applied to a control pulse .phi.PG in order to extend a depletion layer under the photo gate 2. The FD portion 21 sets a control pulse .phi.R to the H level and is fixed to a power source V.sub.DD in order to prevent a blooming during the accumulation. When the photons h.nu. are irradiated and carriers occur under the photo gate 2, electrons are accumulated in the depletion layer under the photo gate 2 and holes are ejected through the p-type well 17.
Since an energy barrier by the transfer MOS transistor 3 is formed among the photoelectric converting unit 1, p-type well 17, and FD portion 21, the electrons exist under the photo gate 2 during the accumulation of the photo charges (FIG. 11C). When the apparatus enters a reading mode, the control pulse .phi.PG and a control pulse .phi.TX are set so as to eliminate the barrier under the transfer MOS transistor 3 and to completely transfer the electrons under the photo gate 2 to the FD portion 21 (FIG. 11D). Since the complete transfer is executed, an after-image and noises are not generated in the photoelectric converting unit 1. When the electrons are transferred to the FD portion 21, an electric potential of the FD portion 21 changes in accordance with the number of electrons. By outputting a potential change to the external horizontal selection switch MOS transistor 6 through a source of the source-follower amplifier MOS transistor 5 by the source-follower operation, photoelectric converting characteristics of a good linearity can be obtained. Although kTC noises by resetting are generated in the FD portion 21, they can be eliminated by sampling and accumulating a dark output before the transfer of light carriers and obtaining a difference between the dark output and the light output. The CMOS sensor is, therefore, characterized by low noises and a high S/N signal. Since the complete non-destructive reading is performed, multi-functions can be realized. Further, there are also advantages such that a high yield due to an XY address system and a low electric power consumption are obtained.
The above conventional apparatus, however, has drawbacks such that since one photo gate, four MOS transistors, and four horizontal driving lines exist for each pixel, as compared with the sensor of the CCD type, it is difficult to reduce the number of pixels and a numerical aperture also decreases.
There is also a drawback such that since the addition of the photoelectric conversion signals to perform a TV scan is also executed by a peripheral circuit, an operating speed becomes slow.